Question 3-31D6

A Phase-Locked Loop (PLL) is indeed a **servo loop** designed to synchronize an oscillator's output phase and frequency with an input signal. It achieves this using three core components: * **Phase Detector:** Compares the phase difference between an incoming reference signal and the output of a voltage-controlled oscillator (VCO), producing an error voltage proportional to this difference. * **Low-Pass Filter:** Smooths the error voltage from the phase detector, removing high-frequency components and providing a stable control voltage. * **Voltage-Controlled Oscillator (VCO):** An oscillator whose output frequency changes in response to the control voltage from the low-pass filter. The loop continuously adjusts the VCO's frequency until its phase locks onto the input signal, making PLLs crucial for frequency synthesis, demodulation, and signal recovery in radio systems. Option A is incorrect because a ratio detector and reactance modulator are specific to FM demodulation and modulation, not the general structure of a PLL. Option B is incorrect as a monostable multivibrator is a one-shot timing circuit, fundamentally different from a PLL. Option C describes an amplifier configuration, not a frequency/phase control loop.